发明名称 |
Fabrication method of semiconductor integrated circuit device and its testing apparatus |
摘要 |
A testing apparatus and a fabricating method of a semiconductor integrated circuit device for reducing the fabrication cost by placing, in the wafer level burn-in, divided contactors in equally contact with the full surface of wafer, enabling repair of each contactor and improving the yield of contactors. The cassette structure of the mechanical pressurizing system in the testing apparatus is structured with a plurality of divided silicon contactor blocks and a guide frame for integrating these blocks and employs the wafer full surface simultaneous contact system of the divided contactor integration type. Each probe of the silicon contactor is equally placed in contact in the predetermined pressure with each test pad of each chip of the test wafer by mechanically pressuring each silicon contactor block which moves individually, the test control signal is supplied to each chip and this test result signal is obtained for the wafer level burn-in test.
|
申请公布号 |
US2004135593(A1) |
申请公布日期 |
2004.07.15 |
申请号 |
US20040751937 |
申请日期 |
2004.01.07 |
申请人 |
BAN NAOTO;NAMBA MASAAKI;HASEBE AKIO;WADA YUJI;KOHNO RYUJI;SEITO AKIRA;MOTOYAMA YASUHIRO |
发明人 |
BAN NAOTO;NAMBA MASAAKI;HASEBE AKIO;WADA YUJI;KOHNO RYUJI;SEITO AKIRA;MOTOYAMA YASUHIRO |
分类号 |
G01R1/073;G01R31/28;H01L21/66;(IPC1-7):G01R31/02 |
主分类号 |
G01R1/073 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|