发明名称 SEMICONDUCTOR MEMORY DEVICE, AND CONTROL METHOD OF SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory device and a control method of a semiconductor memory device by which a testing time can be shortened at the time of a test, while keeping low current consumption operation at the time of normal access operation. SOLUTION: Selecting signals S0-Sn selecting each column block CB0-CBn are generated by block selecting circuits CBS0-CBSn. A strobe signal SS indicating activation timing and column block addresses CAq to CAq+k are inputted to the block selecting circuits CBS0-CBSn. Many block selecting circuits CBS0-CBSn are selected by test block signals ST0-STn from a test block specifying means 1 activated at the time of test access operation comparing with the block selecting circuits CBS0-CBSn selected by the column block addresses CAq-CAq+k, thus more column blocks CB0-CBn can be activated. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004199795(A) 申请公布日期 2004.07.15
申请号 JP20020367732 申请日期 2002.12.19
申请人 FUJITSU LTD 发明人 KATO KOJI
分类号 G01R31/28;G11C11/401;G11C29/00;G11C29/14;G11C29/34;(IPC1-7):G11C29/00 主分类号 G01R31/28
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