发明名称 Stacked structure of chips
摘要 A stacked structure includes a substrate, a lower chip, wires, an adhesive layer, an upper chip and a glue layer. A cavity and signal input terminals are formed on the substrate. The lower chip is placed within the cavity and adhered to the substrate. Each wire has a first terminal and a second terminal. The first terminals are electrically connected to bonding pads of the lower chip. The second terminals are electrically connected to the signal input terminals. The adhesive layer is coated on the lower chip. The upper chip has a lower surface and an upper surface formed with bonding pads. The upper chip is adhered to the lower chip by the adhesive layer. The wires electrically connect the bonding pads to the signal input terminals of the substrate. The glue layer is applied to the substrate to encapsulate the upper chip, lower chip and wires.
申请公布号 US2004135242(A1) 申请公布日期 2004.07.15
申请号 US20030340309 申请日期 2003.01.09
申请人 HSIN CHUNG HSIEN 发明人 HSIN CHUNG HSIEN
分类号 H01L21/98;H01L23/13;H01L23/31;H01L23/498;H01L25/065;(IPC1-7):H01L23/02 主分类号 H01L21/98
代理机构 代理人
主权项
地址