发明名称 |
Semiconductor integrated circuit having macro cells and designing method of the same |
摘要 |
The present invention enables to design a semiconductor integrated circuit with a small chip area and a small number of wiring layers at a low cost for a short time. In the present design method of the semiconductor integrated circuit, a first wiring group (a horizontal power wiring and horizontal ground wirings) and a second wiring group (a horizontal power wiring and horizontal ground wirings), which are opposite to each other, are arranged at the outside of a macro outer frame, a third wiring group (a vertical power wiring and a vertical ground wiring) is arranged to correspond to a power terminal and a ground terminal on a macro cell, and these first and second wiring groups are connected to the power terminal and the ground terminal by the third wiring group.
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申请公布号 |
US6763511(B2) |
申请公布日期 |
2004.07.13 |
申请号 |
US20020185394 |
申请日期 |
2002.06.28 |
申请人 |
NEC ELECTRONICS CORPORATION |
发明人 |
BANNO AKIHIRO;OOSHIGE SHINICHIROU;SHINTANI MASARU;MATSUI MASARU |
分类号 |
G06F17/50;H01L27/02;H01L27/118;(IPC1-7):G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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