| 摘要 |
A scrambler includes a linear shift register having logic suitable for generating a scrambling sequence according to a predetermined generator sequence, a plurality of logic gates that allow for parallel input to the shift register, and a multiplexer for switching inputs of the shift register. The multiplexer switches inputs so that the shift register can be loaded with a predetermined initial value, and shifted a single bit or shifted a predetermined number of bits though the generator sequence.
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