| 摘要 |
A semiconductor device can be subjected to scan testing by using an input scan test vector. This input scan test vector is processed by the device to produce an output scan test vector, which can be used for diagnostic purposes with respect to the device. There are certain locations in this output scan test vector that may be indeterminate in value, even for a correctly functioning device. In other words, it is not possible to predict beforehand what values the output scan test vector will have at these locations. Therefore, an output mask vector is provided that identifies those locations in the output scan test vector that are indeterminate. This mask vector is then combined with the output scan test vector using a logical operation to produce a determinate masked output scan test vector. For example, if all the indeterminate locations are flagged by a 1 in the mask vector, then using OR for the logical operation will ensure that the output for these locations is always a 1. Having a fully determinate output vector allows a signature to be calculated for this vector, and this signature will have a predetermined value for a correctly functioning device.
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