发明名称 |
FERROELECTRIC MEMORY DEVICE OF MTP STRUCTURE AND FABRICATING METHOD THEREOF |
摘要 |
PURPOSE: A ferroelectric memory device of an MTP(merged top plate) structure is provided to simplify a fabricating process and improve productivity by eliminating the necessity of a mask and etch process of an adhesion layer and a CMP(chemical mechanical polishing) process of a barrier metal. CONSTITUTION: A semiconductor substrate(21) having a transistor is prepared. The first interlayer dielectric(22) is formed on the semiconductor substrate. A storage node contact penetrates the first interlayer dielectric and is connected to a source/drain region of the transistor. A barrier layer comes in contact with the storage node contact and the first interlayer dielectric simultaneously. A lower electrode is formed on the barrier layer, separated from the first interlayer dielectric by a gap. The adhesion layer(27) on the first interlayer dielectric fills the gap while surrounding the side surface of the lower electrode. The second interlayer dielectric surrounds the adhesion layer while exposing the surface of the lower electrode. A ferroelectric layer(29) is formed on the adhesion layer including the second interlayer dielectric. An upper electrode(30) is formed on the ferroelectric layer.
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申请公布号 |
KR20040059762(A) |
申请公布日期 |
2004.07.06 |
申请号 |
KR20020086264 |
申请日期 |
2002.12.30 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
CHOI, EUN SEOK;YUM, SEUNG JIN |
分类号 |
H01L21/8242;H01L21/02;H01L21/8246;H01L27/115;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/8242 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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