发明名称 METHOD FOR FORMING TRIPLE GATE OXIDE LAYER OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a triple gate oxide layer of a semiconductor device is provided to prevent the damage of a logic region by forming gate oxide layers with different thickness on the logic region, an I/O region and a high-voltage device region. CONSTITUTION: A nitride pattern is formed on a substrate(11) to expose a high-voltage device region. The first gate oxide layer(21) with the first thickness is formed on the exposed high-voltage device region. The nitride pattern on a logic and I/O region is selectively removed. Wells(22,23) are formed in the logic region and the I/O region, respectively. The second oxide layer(24) with the second thickness is formed on the I/O region. The third gate oxide layer(26) with the third thickness is formed on the logic region.
申请公布号 KR20040059729(A) 申请公布日期 2004.07.06
申请号 KR20020086134 申请日期 2002.12.28
申请人 HYNIX SEMICONDUCTOR INC. 发明人 SHIN, IL JAE
分类号 H01L21/31;(IPC1-7):H01L21/31 主分类号 H01L21/31
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