发明名称 |
Semiconductor integrated circuit and a testing method thereof |
摘要 |
Operating margins of a semiconductor integrated circuit are reliably tested at low power consumption by switching power supply circuits between normal operation mode wherein a first step-up power supply serves both memory core and a step-down power supply, and testing mode wherein the memory core is powered by an external testing power supply that provides a fluctuating voltage for testing, and the step-down power supply is served by a second step-up power supply.
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申请公布号 |
US6759866(B2) |
申请公布日期 |
2004.07.06 |
申请号 |
US20020274602 |
申请日期 |
2002.10.22 |
申请人 |
FUJITSU LIMITED |
发明人 |
MORI KATSUHIRO;FUJIOKA SHINYA |
分类号 |
G01R31/28;G01R31/30;G01R31/317;G05F3/24;G11C11/401;G11C11/407;G11C29/50;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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