摘要 |
PURPOSE: A method for forming a metal line of a semiconductor device is provided to enhance the reliability by preventing deterioration of a sidewall of a via hole and improving an adhesive characteristic of an interlayer dielectric. CONSTITUTION: A dual damascene pattern including a via hole and a trench is formed on an interlayer dielectric(102,106) of a semiconductor substrate(101) in order to expose a predetermined region of a lower metal line(105) through the via hole. A silicide layer(109) is formed on the exposed region of the lower metal line by performing a silicide process. The silicide layer is removed from the lower metal line. The silicide layer is redeposited on a sidewall of the via hole by performing a sputtering etch process. The dual damascene pattern is buried by a conductive material in order to form an upper metal line(112) and a via plug.
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