发明名称 |
Analog-to-digital conversion circuit |
摘要 |
Digital signals of the most significant bit to the least significant bit are supplied to a digital calibration operation unit from a redundancy correction circuit, and an intermediate high order 2-bit digital signal is supplied to a correction value selection circuit. A DC control signal is supplied to the correction value selection circuit. A plurality of groups of correction values corresponding to the values of the intermediate high order 2-bit digital signal are stored in advance in a correction value ROM. The correction value selection circuit reads out a correction value from the correction value ROM based on the DC control signal and the intermediate high order 2-bit digital signal. The digital calibration operation unit adds the correction value AM to the digital signals of the most significant bit to the least significant bit, and outputs a resulting value as a digital output value.
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申请公布号 |
US2004125006(A1) |
申请公布日期 |
2004.07.01 |
申请号 |
US20030663984 |
申请日期 |
2003.09.17 |
申请人 |
TANI KUNIYUKI;WADA ATSUSHI;KOBAYASHI SHIGETO |
发明人 |
TANI KUNIYUKI;WADA ATSUSHI;KOBAYASHI SHIGETO |
分类号 |
H03M1/10;H03M1/16;(IPC1-7):H03M1/12 |
主分类号 |
H03M1/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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