| 摘要 |
<p>A variable resolution analog-to-digital converter comprises a sample-and-hold circuit (11) including a plurality of sample-and-hold units which are connected in parallel and selectively activated corresponding to a required resolution to sample and hold an analog input signal, a plurality of conversion stages (12A, 12B, 13A, 13N) connected in cascade to an output of the sample-and-hold circuit to convert an output signal of the sample-and-hold circuit to a plurality of bit signals, and a synthesis circuit (15) to synthesize the bit signals, to generate a digital output signal. <IMAGE></p> |
