发明名称 |
Semiconductor device and its manufacturing method |
摘要 |
Gate electrodes of a TLPM and gate electrodes of planar devices are formed by patterning a same polysilicon layer. Drain electrode(s) and source electrode(s) of the TLPM and drain electrodes and source electrodes of the planar devices are formed by patterning a same metal layer. Therefore, the TLPM and the planar devices can be connected electrically to each other by resulting metal wiring layers and polysilicon layers without the need for performing wire bonding on a printed circuit board. <IMAGE> |
申请公布号 |
EP1329956(A3) |
申请公布日期 |
2004.06.23 |
申请号 |
EP20030000642 |
申请日期 |
2003.01.16 |
申请人 |
FUJI ELECTRIC CO., LTD. |
发明人 |
SUGI, AKIO;FUJISHIMA, NAOTO;KITAMURA, MUTSUMI;TABUCHI, KATSUYA;WAKIMOTO, SETSUKO |
分类号 |
H01L21/8234;H01L21/8249;H01L27/06;H01L27/088;H01L29/417;H01L29/45;H01L29/78 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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