发明名称 Vertical flash memory cell with buried source rail
摘要 A non-volatile memory cell has been described that includes source and drain regions that are fabricated on different horizontal planes. A floating gate and a control gate are fabricated vertically to control current conducted through the transistor. The control gate is coupled to a word line that is located above the transistor and traverses the memory in a direction perpendicular to the control gate.
申请公布号 US2004115886(A1) 申请公布日期 2004.06.17
申请号 US20030671112 申请日期 2003.09.25
申请人 MICRON TECHNOLOGY, INC. 发明人 RUDECK PAUL
分类号 H01L27/115;H01L29/788;(IPC1-7):H01L21/336 主分类号 H01L27/115
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