发明名称 APC CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an APC circuit that suppresses the occurrence of jitters. SOLUTION: The APC circuit is provided with a re-load latch 5, which stores the number of high-speed clocks generated from a ring oscillator 3 while external dot clocks are at H level. In the circuit, when a horizontal synchronous signal Hsync is input, the output of level signals at L level is started, and the level signals are reversed when clocks are generated from the ring oscillator 3 in the same number as stored in the re-load latch 5. Thus, the occurrence of jitters is suppressed to prevent a display disorder on a screen. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004173075(A) 申请公布日期 2004.06.17
申请号 JP20020338182 申请日期 2002.11.21
申请人 RENESAS TECHNOLOGY CORP;RENESAS LSI DESIGN CORP 发明人 NOMURA KAZUHISA
分类号 H04N5/04;G09G5/00;G09G5/18;(IPC1-7):H04N5/04 主分类号 H04N5/04
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