发明名称 AUTOMATED LAYOUT METHOD, PROGRAM, AND RECORDING MEDIUM
摘要 PROBLEM TO BE SOLVED: To miniaturize an LSI by suppressing occurrence of a non-used area. SOLUTION: An outer frame 11 is manufactured for an analogue circuit comprising analogue macros 10a and 10b according to the shape. A plurality of pseudo unit cells 12a-12f that inscribe the outer frame 11 are connected together. The analogue circuit is handled as a single unit cell which is represented by a set of pseudo unit cells 12-12f. The shape of the analogue circuit is represented by a set of coordinates of two opposing corners of the rectangular of pseudo unit cells 12a-12f, for later generation of layout information or automated layout wiring. Thus, even with an analogue circuit whose shape is other than rectangular, the increase in data quantity or calculation amount that follows the automated layout is suppressed while the occurrence of unused area is suppressed, resulting in a smaller size of an LSI chip. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004165443(A) 申请公布日期 2004.06.10
申请号 JP20020329756 申请日期 2002.11.13
申请人 FUJITSU LTD 发明人 MATSUDA ATSUSHI
分类号 G06F17/50;H01L21/82;(IPC1-7):H01L21/82 主分类号 G06F17/50
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