| 摘要 |
The high density integrated semiconductor memory has an EPROM cell in the form of a pillar. The cell has a floating gate and a control gate. The EPROM cell is dimensioned so thin that it is fully depleted. The control gate of the preferred split gate flash EPROM cell or of the dual gate flash EPROM cell is composed of p+-doped semiconductor material, so that the fully depleted cylinders exhibit superior lower threshold behavior.
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