| 摘要 |
PROBLEM TO BE SOLVED: To provide a signal processing circuit for realizing a large-scaled parallel hierarchical processing circuit with low power consumption in a small-scaled circuit configuration. SOLUTION: In the signal processing circuit for outputting a predetermined control signal to an arithmetic processing circuit based on circuit configuration information read from a storage means, the arithmetic processing circuit is provided with: a plurality of analog processing blocks AB<SP>I</SP>and AB<SB>S</SB>for applying predetermined signal modulation to an input signal; a plurality of processing result storing memory blocks MB for temporarily storing outputs from the plurality of analog processing blocks AB<SP>I</SP>; a plurality of arithmetic control data memory blocks WB for storing data for controlling the arithmetic characteristics of the plurality of analog processing blocks AB<SB>S</SB>; and a plurality of signal lines for connecting the plurality of processing result storing memory blocks MB or the plurality of analog processing blocks AB<SP>I</SP>. Then, data reading from the arithmetic control data memory blocks WB is controlled to make the arithmetic processing circuit carry out a plurality of signal processing functions different from each other. COPYRIGHT: (C)2004,JPO
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