Clock regeneration circuit

摘要

A clock regeneration circuit for regenerating a clock signal for demodulating data from an AM data multiplex modulated signal where digitally modulated signals are multiplexed in the same frequency band as those of an amplitude-modulated signal at the same time. The carrier for an amplitude-modulated signal is extracted from an AM data multiplex modulated signal where digitally modulated signals are multiplexed in the same frequency band as those of the amplitude-modulated signal at the same time through a band-pass filter, and the oscillation frequency of a voltage-controlled oscillator is controlled by the output of a phase comparator through a loop filter. The oscillation output of the voltage-controlled oscillator is supplied to a direct digital synthesizer and the phase of the carrier extracted through the band-pass filter is compared with the phase of the output of the direct digital synthesizer using the phase comparator. The oscillation output of the voltage-controlled oscillator is then synchronized with the carrier for the amplitude-modulated signal to produce a clock signal for demodulating data.