发明名称 Method for testing a computer bus using a bridge chip having a freeze-on-error option
摘要 A method for testing a computer bus using a bridge chip having a freeze-on-error option that enables a computer system's central processing unit (CPU) to recover and continue processing even when the computer bus is not functional. The testing method of the present invention remains transparent to a user and can be accomplished while performing standard diagnostics tests. In general, the present invention injects an input/output (I/O) error into a specific bus slot of the computer bus to test the functionality (such as the error recovery capability) of the bus. The present invention then recovers from the failure condition without having the computer system shutdown or stop working and without having to restart the computer system. More specifically, the method for testing a computer bus according to the present invention includes enabling the freeze-on-error option on the bridge chip, injecting an error into the specified computer bus slot and recovering from the injected error. The error recover capability of the computer bus is determined by examining the status of the bus slots both with the injected error condition and without the injected error condition.
申请公布号 US6745345(B2) 申请公布日期 2004.06.01
申请号 US20000730406 申请日期 2000.12.04
申请人 IBM 发明人 CABEZAS RAFAEL G;DHOPESHWARKAR DHIRENDRA;KOVACS ROBERT G;TYSOR ARTHUR J
分类号 G06F11/267;(IPC1-7):G06F11/00 主分类号 G06F11/267
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