发明名称 |
Semiconductor component, typically lower electrode of capacitor in semiconductor memory, for memory miniaturizing using 3D capacitor, with several capacitor contact plugs between two |
摘要 |
Several capacitor contact plugs are formed between two bit lines at preset interval, with their center points at intersections of imaged X and Y axial lines. X axial lines are parallel to bit lines and X axial lines orthogonal to X axial lines. Several lower electrodes of capacitors are formed within preset interval for connecting each, in unambiguous manner, to contact plugs of capacitors. Each lower electrode has plane with octagonal or circular shape. Preferably there is no overlapping region between adjacent lower electrodes. Independent claims are included for manufacture method of invented semiconductor component.
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申请公布号 |
DE10342998(A1) |
申请公布日期 |
2004.05.27 |
申请号 |
DE20031042998 |
申请日期 |
2003.09.17 |
申请人 |
HYNIX SEMICONDUCTOR INC., ICHON |
发明人 |
KIM, DONG-SAUK;LEE, HO-SEOK;PARK, BYUNG-JUN;KWON, IL-YOUNG;LEE, JONG-MIN;KIM, HYEONG-SOO;KIM, JIN-WOONG;CHOI, HYUNG-BOK;SHIN, DONG-WOO |
分类号 |
H01L21/8242;G11C8/02;H01L21/82;H01L27/02;H01L27/10;H01L27/108;(IPC1-7):H01L27/108;H01L21/824 |
主分类号 |
H01L21/8242 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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