发明名称 |
One-time-programmable bit cell with latch circuit having selectively programmable floating gate transistors |
摘要 |
An OTP bit cell includes a latch circuit of cross-coupled inverters. A floating gate PMOS transistor is inserted in each of the inverters. One or the other of the floating gate PMOS transistors is programmed through an included programming circuit so that a differential output of the latch circuit provides a corresponding logic state that is the same each time when read. To program a selected floating gate PMOS transistor, appropriate write inputs are applied to the programming circuit while a high reference voltage to the OTP bit cell is raised to a level such that the selected floating gate PMOS transistor is programmed.
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申请公布号 |
US6741500(B2) |
申请公布日期 |
2004.05.25 |
申请号 |
US20020264756 |
申请日期 |
2002.10.04 |
申请人 |
HPL TECHNOLOGIES, INC. |
发明人 |
DESHAZO DARAN;SUTANDI AGUSTINUS;STEVENS JASON |
分类号 |
G11C16/04;(IPC1-7):G11C16/00 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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