| 摘要 |
PURPOSE: A pulse swallow function type phase locked loop(PLL) is provided to reduce the power consumption of the system by implementing the function of the two counters with one counter as well as to reduce the area of the layout during the design of the ASIC. CONSTITUTION: A pulse swallow function type phase locked loop(PLL) includes a program counter, a program count detection block(36) and a swallow count detection block. The program counter divides the output of the prescaler with a predetermined division ratio and outputs the comparison frequency. The program count detection block(36) allows the program counter to be reset by using the count output signal of the program counter. And, the swallow count detection block outputs the mode control signal to control the prescaler synchronized with the output signal of the prescaler by using the count output signal of the program counter.
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