| 摘要 |
PROBLEM TO BE SOLVED: To provide an encryption circuit for increasing an operation clock frequency in the encryption circuit and speeding up an arithmetic speed. SOLUTION: An adding and subtracting circuit 35 executes adding and subtracting by using a carry-in signal from other arithmetic circuit and outputs a carry-out signal generated by the adding and subtracting. A right shift circuit 36 executes a right shift by using a shift-in signal from other arithmetic circuit and outputs a shift-out signal generated by the right shift. Accordingly, the propagation path of carries can be shortened even if a data length of arithmetic data is lengthened, and the operation clock frequency in the encryption circuit can be increased. COPYRIGHT: (C)2004,JPO
|
