发明名称 High integrity control system architecture using digital computing platforms with rapid recovery
摘要 A control system architecture suitably includes sufficient computation redundancy and control command management to isolate and recover a faulted processor and/or to recover all processing units in the redundant system without adverse effects. Computational redundancy may be provided with multiple processors and/or processing units within computers or computing platforms. In addition to isolating and recovering from internal faults, various embodiments allow computing units to detect faults in other system elements such as sensors, adaptors, actuators and/or effectors. Further embodiments may also include one or more actuator adaptor units that detect faults in other system components and issue discrete instructions to trigger a recovery. In some embodiments, the recovery is performed within one or two computing frames, or otherwise in a short enough time period so as to have only minimal affects, if any, on system performance or redundancy.
申请公布号 US2004098140(A1) 申请公布日期 2004.05.20
申请号 US20020300185 申请日期 2002.11.20
申请人 HESS RICHARD 发明人 HESS RICHARD
分类号 G05B9/03;G05B23/02;G05D1/00;(IPC1-7):G05B19/18;G05B11/01;G05B9/02 主分类号 G05B9/03
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