发明名称 Non-volatile memory device achieving fast data reading by reducing data line charging period
摘要 Capacitors are provided for changing the voltage level of data lines, respectively, in a data reading operation. A signal line electrically coupled to capacitors is provided. Capacitors charge data lines in accordance with the voltage level of signal line by capacitive coupling. Thus, data lines can be charged quickly to achieve a fast data reading operation.
申请公布号 US2004095828(A1) 申请公布日期 2004.05.20
申请号 US20030458369 申请日期 2003.06.11
申请人 RENESAS TECHNOLOGY CORP. 发明人 HIDAKA HIDETO
分类号 G11C16/06;G11C7/10;G11C11/15;G11C13/00;(IPC1-7):G11C7/02 主分类号 G11C16/06
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