发明名称 |
Quadrature demodulator with phase-locked loop |
摘要 |
A quadrature demodulator applicable to digital communication and digital broadcast is provided, which simplifies the circuit configuration of a quadrature demodulator section and which reduces the labor or man-hours and the time required for adjusting the demodulation characteristic. This quadrature demodulator is comprised of (a) an oscillator section for generating a local signal with a local frequency of twice a carrier frequency; (b) a quadrature demodulator section for generating two orthogonal baseband signals by frequency-converting an input signal with a specific frequency using the local signal; (c) a PLL section for stabilizing the local frequency by applying its output signal corresponding to a difference between the local frequency of the local signal and a predetermined reference frequency to the oscillator section; (d) the oscillator section having an oscillator capable of varying its oscillation frequency by changing its driving current, the driving current being changeable according to the output signal of the PLL section; and (e) the local frequency of the local signal being kept constant by adjusting the driving current of the oscillator section by way of the output signal of the PLL section. <IMAGE> |
申请公布号 |
EP1107531(A3) |
申请公布日期 |
2004.05.19 |
申请号 |
EP20000126856 |
申请日期 |
2000.12.07 |
申请人 |
NEC COMPOUND SEMICONDUCTOR DEVICES, LTD. |
发明人 |
SYOJI, AKIHIKO |
分类号 |
H03L7/099;H04L27/00;H04L27/22;H04L27/227 |
主分类号 |
H03L7/099 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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