发明名称 Multi-layered semiconductor device and method of manufacturing same
摘要 A semiconductor device includes: a multi-layered wiring substrate in which a multiple wiring pattern layers are laminated through insulating layers. The multi-layered wiring substrate has a first, semiconductor element mounting face and a second face opposite to the first face. A semiconductor element is mounted on and connected to connecting pads on the first face. A chip-capacitor is arranged on and connected to the connecting pads on the second face. An electric power supply circuit includes the chip-capacitor for supplying electric power to the semiconductor element. Conductor paths for electrically connecting the first connecting pads with the second connecting pads are substantially extended vertically and penetrate through the multi-layered wiring substrate through so as to reduce the length of the conductor paths to a minimum, so that the chip-capacitor is located at the opposite side of the semiconductor element.
申请公布号 US2004090758(A1) 申请公布日期 2004.05.13
申请号 US20030701612 申请日期 2003.11.06
申请人 HORIKAWA YASUYOSHI 发明人 HORIKAWA YASUYOSHI
分类号 H01L23/12;H01L23/498;H05K1/02;H05K3/42;H05K3/46;(IPC1-7):H05K7/06 主分类号 H01L23/12
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