发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE WITH STACKED CONTACT STRUCTURE
摘要 PURPOSE: A non-volatile semiconductor memory device is provided to reduce the TAT(Turn-Around-Time) and to enhance the degrees of integration and speed by using a stacked contact structure. CONSTITUTION: A plurality of insulating layers(18,22,25) and metal films(21,24) are alternately formed on a memory transistor. A contact hole is formed in each insulating layer. A metal plug(20,23,26) is filled in each contact hole to contact electrically adjacent metal films. A bit line(BL) made of metal is formed on the resultant structure. The contact holes are aligned with each other. Whether the memory transistor is connected to the bit line or not is determined in accordance with the presence of the metal plug in each insulating layer.
申请公布号 KR20040038662(A) 申请公布日期 2004.05.08
申请号 KR20030072065 申请日期 2003.10.16
申请人 SANYO ELECTRIC CO., LTD. 发明人 TAKAHASHI SHUICHI;SHIKAKURA FUMIKO;MORI SHINYA;YAMADA JUNJI;YAMADA YUTAKA;TANIGUCHI TOSHIMITSU
分类号 G11C17/08;H01L21/8246;H01L23/48;H01L23/52;H01L27/10;H01L27/112;H01L27/115;(IPC1-7):H01L27/115 主分类号 G11C17/08
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