发明名称 Transceiver system and method supporting multiple selectable voltage controlled oscillators
摘要 A phase lock loop comprising a plurality of voltage controlled oscillators is presented herein. The phase lock loop can provide a wide range of output frequencies with low jitter. Additionally, the phase lock loop can be incorporated into a clock multiplier unit and a clock and data recovery unit.
申请公布号 US2004086029(A1) 申请公布日期 2004.05.06
申请号 US20030444023 申请日期 2003.05.22
申请人 CARESOSA MARIO;KOCAMAN NAMIK 发明人 CARESOSA MARIO;KOCAMAN NAMIK
分类号 H03L7/099;H03L7/18;H04J3/04;H04J3/06;H04L7/033;H04Q11/04;(IPC1-7):H04K1/00;H04B1/69 主分类号 H03L7/099
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