DEVICE FOR TIMING RECONSTRUCTION OF A DATA CHANNEL TRANSPORTED ON A PACKET NETWORK AND ITS PROCESS

摘要

A memory (2) for data accumulation includes an input (3) on which such data are entered as a stream of input data (Pin) under the control of an input timing signal (xIN), and an output (4) starting from which the data entered in memory (2) are rea d as a stream of output data (Pout) under the control of a reconstructed timing signal (XOUT). A phase-locked loop (7) uses this input timing signal (xIN) as an input sign al to generate a corresponding phase-locked output signal (xOUT). The reconstructe d timing signal is obtained starting from the output signal of such phase-locked loop output (7). Means (8) are provided to measure residual phase wander and act (23, 9, 10) on the transfer function band of the phase of phase-locked loop output (7), which i s preferable without ring filters (Figure 1).