发明名称 Multi-layer silicide block process
摘要 An integrated circuit resistor (170) is formed on an isolation dielectric structure (20) formed in a semiconductor (10). A patterned silicon nitride layer (125) and an optional patterned silicon oxide layer (135) is formed on the surface of the resistor polysilicon layer (40) that functions to mask the surface of the integrated circuit resistor (170) during the formation of metal silicide regions (160) on the integrated circuit resistor (170).
申请公布号 US6730554(B1) 申请公布日期 2004.05.04
申请号 US20020301246 申请日期 2002.11.21
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 BALDWIN GREG C.;MEHRAD FREIDOON
分类号 H01L21/02;H01L27/06;(IPC1-7):H01L21/823 主分类号 H01L21/02
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