发明名称 Leaky cache mechanism
摘要 An apparatus for and method of improving the efficiency of a level two cache memory. In response to a level one cache miss, a request is made to the level two cache. A signal sent with the request identifies when the requester does not anticipate a near term subsequent use for the requested data element. If a level two cache hit occurs, the requested data element is marked as least recently used in response to the signal. If a level two cache miss occurs, a request is made to level three storage. When the level three storage request is honored, the requested data element is immediately flushed from the level two cache memory in response to the signal.
申请公布号 US6728835(B1) 申请公布日期 2004.04.27
申请号 US20000650730 申请日期 2000.08.30
申请人 UNISYS CORPORATION 发明人 BAUMAN MITCHELL A.;SHIMADA CONRAD S.;VARTTI KELVIN S.;BORGERDING WILLIAM L.
分类号 G06F12/08;G06F12/12;(IPC1-7):G06F12/00;G06F13/00 主分类号 G06F12/08
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