| 摘要 |
843,722. Comparing digital data. WESTERN ELECTRIC CO. Inc. April 8, 1958 [April 10, 1957], No. 11041/58. Class 106 (1). [Also in Group XXXVIII] An electrical network for comparing two binary numbers comprises a plurality of comparison circuits each receiving binary digit signals of like significance and corresponding output circuits so arranged to indicate which of the compared numbers is the larger and to provide a distinctly weighted output signal indicating the magnitude of the difference between them. The comparator network shown comprises stages A, B ... N to which are applied the digits a 1 , a 2 ... a n and b 1 , b 2 ... b n of the two binary numbers to be compared. " Exclusive OR " circuits such as 100, Fig. 2A, convert the number b 1 , b 2 ... b n into reflected binary form g 1 , g 2 . . . g n before comparison. The comparator stages, Fig. 2B, are identical except that the end stages A and N are simplified. Each intermediate stage such as B comprises: a comparison portion including an " exclusive OR " circuit 220, AND circuits 225, 230 and inverters 224, 232; a carry portion, including OR circuits 240, 235, which receives a " carry " signal c 1 or d 1 from the next higher stage A and supplies carry signal c 2 or d 2 to the next lower stage; and an output portion including AND circuits 255, 260 which are responsive to the carry signals and also to signals from the next lower stage. The output signals from circuits 255, 260 are applied to resistors R 2 connected via inhibit circuits 296 to positive and negative lines 290, 291 respectively. The resistors such as R 2 have values weighted according to the corresponding binary powers, thus forming a digital-to-analogue converter 295; and only the output signal having the largest weighting is permitted to reach the output leads, such signal inhibiting circuits 296 for the lower stages. The comparator network operates according to rules such that, an output is obtained from the most significant stage in which the compared digits mismatch, unless the digits in one or more succeeding positions mismatch in the opposite direction when an output is obtained from the stage corresponding to the last of the oppositely mismatched digit pairs but with the polarity of the highest mismatched pair. Thus e.g. if the two numbers are 6 = 0110 and 9 = 1001 applied to stages A, B, N-1, N, there would be no output in response to the negative mismatch in stage A but an output, representing " - 2 " would be obtained from stage N-1. In a modification (Fig. 3, not shown), an output is obtained on one lead to indicate relative magnitude (i.e. which number is greater) and an output on a second lead (which normally carries a signal representing " 1 ") indicating the approximate magnitude of the difference. The comparator may be employed for address selection in a C.R.T. storage system as described in Specification 836,235. Specifications 663,872, 836,234 and 843,723 also are referred to. |
