发明名称 PHASE-LOCKED-LOOP CIRCUIT AND METHOD
摘要 A phase locked loop circuit for generating a frequency-controlled output signal and a method for providing a frequency controlled output signal in a phase locked loop circuit are introduced. A controllable oscillator unit (260, 460) of said phase locked loop is operated for generating the output signal (261, 461). A frequency of said output signal (261, 461) is evoked by providing the oscillator unit (260, 460) with a first control signal (281, 381, 481) and with a second control signal (241, 341, 441). The first control signal (281, 381, 481) and the second control signal (241, 341, 441) are adapted automatically such that a given reference frequency is achieved in the output signal (261, 461).
申请公布号 WO2004015869(A8) 申请公布日期 2004.04.22
申请号 WO2003IB02918 申请日期 2003.06.27
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION;CRANFORD JR., HAYDEN, C.;NORMAN, VERNON, R.;SCHMATZ, MARTIN 发明人 CRANFORD JR., HAYDEN, C.;NORMAN, VERNON, R.;SCHMATZ, MARTIN
分类号 H03L7/089;H03L7/10;(IPC1-7):H03L7/085 主分类号 H03L7/089
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