发明名称 Dual damascene interconnect
摘要 A dual damascene process is disclosed, in which a contact via and trench pattern is etched into insulating layer(s). The via is first partially filled by selective metal (e.g., tungsten) deposition, thereby forming a partial plug that raises the floor and reduces the effective aspect ratio of the trench and via structure. The remaining portion of the contact via is then filled with a more conductive material (e.g., aluminum). This deposition also at least partially fills the overlying trench to form metal runners. In the illustrated embodiment, hot aluminum deposition fills the portion of the contact via left unoccupied by the selective deposition and overfills into the trench. A further, cold aluminum deposition then follows, topping off the trench prior to planarization. The dual damascene structure thus exhibits a raised floor relative to conventional dual damascene metallization, while still retaining the conduction benefits of aluminum through a significant portion of the contact and the metal runner formed in the trench.
申请公布号 US6724089(B2) 申请公布日期 2004.04.20
申请号 US20020317265 申请日期 2002.12.11
申请人 MICRON TECHNOLOGY, INC. 发明人 TRIVEDI JIGISH D.;VIOLETTE MIKE P.
分类号 H01L21/285;H01L21/44;H01L21/4763;H01L21/768;H01L23/48;(IPC1-7):H01L28/528;H01L28/532 主分类号 H01L21/285
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