| 摘要 |
PROBLEM TO BE SOLVED: To provide an image processing apparatus which makes efficient use of a large number of computing units, prevents the enlargement of a circuit scale and increase in cost, and easily miniaturizes clock skew to a minimum level. SOLUTION: A resister unit 13124 having a plurality of registers and a plurality of computing units corresponding to a plurality of the resisters are included. The computing units are divided into a plurality of computing units groups OPGRP1A to OPGRP4A. Each computing unit group has a pixel engine 13122 divided into a plurality of computing element units, including each computing unit and the register corresponding to the computing unit, a crossbar circuit 13125 to which each register and the output of each computing unit are connected and a plurality of connection circuit networks FCCN1 to FCCN4, which connect the crossbar circuit to each computing unit group. Each connection circuit network includes a plurality of signal lines that connect a plurality of signal lines, which connect the crossbar circuit to the input port of the register of each computing element unit of the pixel engine, to an input/output between the computing elements of each computing element unit and/or the crossbar circuit. COPYRIGHT: (C)2004,JPO
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