| 摘要 |
<p>A processor issues an instruction including a branching instruction having a first identifier (ID=0), and executes speculation by the branching estimation. When a branching mistake is detected, an instruction in the correct direction is issued with a second identifier (ID=1) after the mistakenly issued instruction. After all the instructions issued prior to the branching are completed the instruction which has been mistakenly issued by the branching estimation is canceled, and issuing of the instruction in the correct direction is resumed. Since the processor updates the identifier (ID) attached to the instruction after the branching mistake has occurred, it is possible to issue the instruction in the correct direction without waiting for completion of all the instructions issued before the branching instruction which has caused a mistake, there by improving the processing performance. At least two identifiers are sufficient to be attached to the instruction, which reduces the quantity of the hardware.</p> |
