发明名称 REED-SOLOMON CODING CIRCUIT AND REED-SOLOMON DECODING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a reed-solomon encoding circuit in which the frame length and the maximum number of error correction are arbitrarily set. SOLUTION: The encoding circuit is provided with a plurality of constant multiplying circuits 110-0 to 110-19 for inputting data and applying constant multiplying to each of them, registers 120-0 to 120-19 provided in correspondence to each of the constant multiplying circuits, first adders 130-1 to 130-19 for storing into the next stage register the sum of a calculation result of the corresponding constant multiplying circuit and storage data of a preceding stage register, a selector 153 for inputting the storage data of the registers 120-0 to 120-19 and selectively outputting any of the storage data in accordance with the maximum number of error correction, and a second adder 161 for supplying the sum of the storage data outputted by the selector 153 and the external input data to the constant number multiplying circuits 110-0 to 110-19. Since it is possible to output the storage data of the register selectively in accordance with the maximum number of error correction, it is possible to set the frame length and the maximum number of error correction arbitrarily. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004120419(A) 申请公布日期 2004.04.15
申请号 JP20020281661 申请日期 2002.09.26
申请人 OKI ELECTRIC IND CO LTD 发明人 IKEGAMI MASANORI
分类号 G06F11/10;H03M13/15;H03M13/35;H04L1/00;(IPC1-7):H03M13/15 主分类号 G06F11/10
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