发明名称 Enhanced protection for input buffers of low-voltage flash memories
摘要 An input buffer is discussed that inhibits semiconductor breakdown of thin gate-oxide transistors in low-voltage integrated circuits. One aspect of the input buffer includes an input stage having a gate, a drain, and a source. The gate of the input stage is receptive to an inhibiting signal, and the drain is receptive to an input signal. The input stage inhibits the input signal from being presented at the source of the input stage when the inhibiting signal is at a predetermined level. The input buffer further includes an output stage having an inverter that includes a first connection and a second connection. The first connection couples to the source of the input stage, and the second connection presents the input signal to a low-voltage flash memory device.
申请公布号 US2004071033(A1) 申请公布日期 2004.04.15
申请号 US20030673756 申请日期 2003.09.29
申请人 MICRON TECHNOLOGY, INC. 发明人 MAROTTA GIULIO-GIUSEPPE;D'AMBROSIO ELIO
分类号 G11C7/10;H03K17/00;H03K17/08;H03K17/687;H03K19/003;H03K19/0175;(IPC1-7):G11C7/00 主分类号 G11C7/10
代理机构 代理人
主权项
地址