| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce a chip area in a twin-cell semiconductor memory device. <P>SOLUTION: In a twin-cell semiconductor memory device 1 that stores data as complementary information into a pair of memory cell, a memory cell MC is arranged at a bit-line pitch for each word lines WLa, WLb, and then the twin cell is formed with two memory cells MC, which are connected with bit-lines BL1/BL2 or bit-lines BL2/BL2 and stored with complementary information which indicates a region E1 or a region E2. <P>COPYRIGHT: (C)2004,JPO |
