发明名称 |
Electronic circuit and semiconductor storage device |
摘要 |
An electronic circuit according to this invention includes a first delay compensation circuit which receives a first power supply voltage and a first signal and outputs a first output signal delayed by a first predetermined time, a second delay compensation circuit which receives a second power supply voltage and the first signal and outputs a second output signal delayed by a second predetermined time, a first logic circuit which receives the first power supply voltage and the second output signal output from the second delay compensation circuit and outputs a first operation result by performing first logic operation, and a second logic circuit which receives the second power supply voltage and the first output signal output from the first delay compensation circuit and outputs a second operation result by performing second logic operation.
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申请公布号 |
US6721213(B2) |
申请公布日期 |
2004.04.13 |
申请号 |
US20020229162 |
申请日期 |
2002.08.28 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
NAKAYAMA ATSUSHI;NAMEKAWA TOSHIMASA |
分类号 |
G11C11/407;G11C5/14;G11C7/22;G11C8/08;G11C8/10;G11C11/4076;G11C11/408;H03K5/00;H03K19/003;H03K19/0175;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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