| 摘要 |
PROBLEM TO BE SOLVED: To provide a clock signal generating circuit having a simple circuit structure for enhancing a clock frequency at checking and enabling the high-speed checking of a semiconductor integrated circuit. SOLUTION: The clock signal generating circuit includes a current generating unit with a current mirror configuration having a first transistor M1 and a plurality of second transistors M2, M4 with a fuse 14 for generating a constant current, and a ring oscillator made up of inverters M13, M14, M17, M18, M21, M22, M23 and M24 and capacitors C1, C2 and, C3 with multiple step cascade connection for feeding the constant current from the constant current generating units 10, M1, M2 and, M4 to each capacitor through each inverter and charging the capacitor. Then, the clock signal generating circuit has a simple structure and the clock frequency at the check can be enhanced, and the clock frequency at the normal usage can be lowered by cutting the fuse 14. The high-speed checking of a semiconductor integrated circuit can be performed by the simple structure of the circuit. COPYRIGHT: (C)2004,JPO
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