| 摘要 |
PROBLEM TO BE SOLVED: To provide a data processor which operates at high speed by reducing instruction processing time without causing trouble with software compatibility. SOLUTION: When an instruction has a preliminary field, the instruction is stored in an instruction cache memory 101 from a memory 106 in such a manner that information created by predecoding the instruction code of the instruction using a predecoding computing element 100 is stored in the area of the instruction cache memory corresponding to the preliminary field. When the instruction is fetched from the instruction cache memory, the information stored in the area of the instruction cache memory corresponding to the preliminary field is used. Thus, processes goes on based on the predecoded information without waiting for the decoding of the instruction fetched from the instruction cache memory to complete. COPYRIGHT: (C)2004,JPO
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