发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit by which test signal wiring is designed easily and raising of a test unit price with test execution is suppressed. SOLUTION: The circuit is provided with storage circuits M1 and M2, a test circuit T1 which is supplied with test signals including a test input signal SIN, a test output signal and a test synchronization signal CLK to be used for synchronizing with test operation and tests the operation of the storage circuit M1, and a test circuit T2 which is connected with the post stage of the test circuit T1 to receive the test signals output from the test circuit T1 and tests the operation of the storage circuit M2. The test circuit T1 uses the test input signal SIN as information for operating the storage circuit T1 synchronizing with the test synchronization signal and outputs it to a test circuit T2 at the next stage. The test circuit T1 synchronizes an output decided by the logic of the output of the storage circuit M1 and the supplied test output signal with the test synchronization signal and outputs it to the test circuit T2 as the test output signal. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004111561(A) 申请公布日期 2004.04.08
申请号 JP20020270496 申请日期 2002.09.17
申请人 TOSHIBA CORP 发明人 NAKAYAMA ATSUSHI
分类号 G01R31/28;G01R31/3185;G11C29/02;G11C29/48;H01L21/822;H01L27/04;(IPC1-7):H01L21/822;G11C29/00 主分类号 G01R31/28
代理机构 代理人
主权项
地址