| 摘要 |
PURPOSE: A semiconductor memory device having a twin column decoder is provided to improve operation speed by realizing two column decoders on both sides of a column line. CONSTITUTION: The semiconductor memory device comprises a number of cell array blocks, and a bit line sense amplifier array is located between the cell array blocks and comprises a bit line sense amplifier and a column transistor. A column pre decoding unit(130) performs pre-decode of a column address signal. Column lines transmit a signal controlling the operation of the column transistor to connect the bit line sense amplifier to a data bus line. And the first and the second column decoding unit(120,200) are connected to both ends of the column lines and enable one column line of the column lines by an output signal of the column pre decoding unit.
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