发明名称 Method for making three-dimensional capacitors for semiconductor memory devices
摘要 A method for making metal-insulator-metal (MIM) capacitors having insulators with high-dielectric-constant or ferroelectric interelectrode films compatible with the dual-damascene process is achieved. The method of integrating the MIM with a dual-damascene process is to form a planar a first insulating layer and to deposit an etch-stop layer and a second insulating layer. Capacitor node contact openings are etched to the substrate and first recesses are etched to the etch-stop layer. The contact openings and first recesses are filled with a conducting layer using a dual-damascene process. Second recesses are formed in the second insulating layer around the capacitor node contacts. A conformal first metal layer, an interelectrode dielectric layer, and a second metal layer are deposited, and are patterned at the same time to form the capacitors over the node contacts. The second recesses increase the capacitor area while the simultaneous patterning of the metal layers results in fewer processing steps.
申请公布号 EP1406296(A2) 申请公布日期 2004.04.07
申请号 EP20030392010 申请日期 2003.09.30
申请人 CHARTERED SEMICONDUCTOR MANUFACTURING PTE LTD. 发明人 WEI-HUA, CHENG;YEN, DANIEL;KUNIHOKO, TAKAHASHI;MING, LEI;JOY, THOMAS
分类号 H01L;H01L21/02;H01L21/768;H01L21/8242;H01L21/8246;H01L27/10;H01L27/105;H01L27/108;H01L27/115 主分类号 H01L
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