发明名称 Method of fabricating MOSFET transistors with multiple threshold voltages by halo compensation and masks
摘要 An apparatus including a MOSFET circuit having dual threshold voltage NMOS and PMOS transistors wherein the threshold voltage of a low threshold NMOS transistor is set with a first halo implant, a threshold voltage of a high threshold voltage PMOS transistor is set with a second halo implant, and, a threshold voltage of a high threshold voltage NMOS transistor is enhanced while, a threshold voltage of a low threshold voltage PMOS transistor is compensated with a third halo implant.
申请公布号 US6717221(B2) 申请公布日期 2004.04.06
申请号 US20030426440 申请日期 2003.04.30
申请人 INTEL CORPORATION 发明人 POST IAN R.;MISTRY KAIZAD
分类号 H01L21/8238;(IPC1-7):H01L29/76;H01L29/94;H01L21/823;H01L21/336 主分类号 H01L21/8238
代理机构 代理人
主权项
地址