发明名称 FAILURE ANALYSIS SYSTEM FOR LOGIC LSI AND FAILURE ANALYSIS METHOD
摘要 <P>PROBLEM TO BE SOLVED: To provide a failure analysis system for a logic LSI and a failure analysis method, which properly reproduce the failure, and which facilitate the analysis on the relevance of the true failure to the detected failure. <P>SOLUTION: The failure analysis system for the logic LSI having built-in software includes a function for recording terminal signal information of the logic LSI in synchronization with a clock, a function for reproducing the recorded terminal signal information in synchronization with the clock, a function for comparing the reproduced terminal signal information with terminal signal information of a normal logic LSI, and a function for generating a trace differential map between a trace data map for the logic LSI to be analyzed and a trace data map of the normal logic LSI. <P>COPYRIGHT: (C)2004,JPO
申请公布号 JP2004101203(A) 申请公布日期 2004.04.02
申请号 JP20020259280 申请日期 2002.09.04
申请人 OKI ELECTRIC IND CO LTD;OKI MICRO DESIGN CO LTD 发明人 KONDO TAKAYUKI
分类号 G01R31/28;G01R31/3177;G01R31/3183;G06F11/22;G06F11/25 主分类号 G01R31/28
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