发明名称 |
PROCESSOR SYSTEM WITH CACHE-BASED SOFTWARE BREAKPOINT |
摘要 |
PROBLEM TO BE SOLVED: To provide a method for executing a software breakpoint in a processor system having at least one processor connected with a main memory. SOLUTION: Each processor 102 in a shared memory system 100 has an instruction cache 110 associated with the processor 102, a breakpoint code is inserted at a particular location in the instruction cache 110 of at least given one of the plurality of processors 102 and a control indicator associated with the particular location is set to a state which allows the breakpoint code to be returned to the given processor 102 from the instruction cache in response to a fetch request to a corresponding address. The breakpoint code is returned to the given processor 102 from the instruction cache 110 in response to the fetch request. COPYRIGHT: (C)2004,JPO
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申请公布号 |
JP2004103024(A) |
申请公布日期 |
2004.04.02 |
申请号 |
JP20030319655 |
申请日期 |
2003.09.11 |
申请人 |
AGERE SYSTEMS INC |
发明人 |
BETKER MICHAEL RICHARD;SCHLIEDER BRYAN;WHALEN SHAUN PATRICK;WILSHIRE JAY PATRICK |
分类号 |
G06F9/38;G06F9/44;G06F11/28;G06F11/36;G06F15/00;H04L1/22;(IPC1-7):G06F11/28 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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